1. Field of the Invention
The present invention relates to a generator of reset pulses upon the rise of the power supply (power-on reset), for CMOS-type integrated circuits.
2. Prior Art
In a large variety of integrated circuits, a series of initialization operations is required when the circuit is switched on or restarts its operation after an accidental and unforeseen power cut. For devices to which an external clock on which to synchronise these operations is not supplied, a power-on reset circuit, adapted to generate one or more pulses which start the initialization operations (reset pulses) is required.
For good operation, a power-on reset generator must correctly react whether the supply voltage rises slowly or sharply. This constitutes a problem, due to the difficulty of producing a circuit which detects with the same certainty transitions with widely different rise times.
Power-on reset generators are furthermore required not only to act at the moment on initial switching on, but also in the case of successive brief power interruptions, which may have corrupted the data stored in the circuit. On this subject, the minimum time of duration of the power supply interruption (minimum break-time) is critical. The recovery time, i.e. the minimum time required by the generator to reset to conditions capable of intervening in the case of a new break, is also critical. In the CMOS integrated circuits being dealt with, it is also important that the current consumption be as reduced as possible.
Known power-on circuits achieve one or the other of the abovesaid purposes, but not all thereof simultaneously, showing shortcomings either for the excessive consumption of current, or for the excessively long recovery time, or for the narrow range of accepted rise times.